Field programmable gate array (FPGA) realization of a fast 2-D discrete cosine transform algorithm for higher image compression

Md. Shabiul Islam; M. S. Bhuyan; Mahidur R. Sarker; Masuri Othman

doi:10.5897/IJPS11.895

International Journal of
Physical Sciences

Abbreviation: Int. J. Phys. Sci.
Language: English
ISSN: 1992-1950
DOI: 10.5897/IJPS
Start Year: 2006
Published Articles: 2572

Review

Field programmable gate array (FPGA) realization of a fast 2-D discrete cosine transform algorithm for higher image compression

Md. Shabiul Islam*, M. S. Bhuyan, Mahidur R. Sarker and Masuri Othman

Institute of Micro Engineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia (UKM), 43600 UKM, Bangi Selangor, Malaysia.
Email: [email protected], [email protected]

Article Number - 83CB39416048
Vol.7(4), pp. 519 - 526 , January 2012
https://doi.org/10.5897/IJPS11.895

Accepted: 04 January 2012
Published: 23 January 2012

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